1. Technical Field
The disclosure relates to a test method for an interposer.
2. Related Art
The interposer is a carrier, containing conductive lines and connecting contacts, on which semiconductor chips can be stacked and bonded in a close proximity. The interposer, like a printed wiring board, does not need to have any active component, but the size of the connecting contacts may be relatively small (less than 20 microns), and the quantity may be relatively large (greater than 200,000). Therefore, it is more difficult to use a contact test method to test the connections of all the conductive lines and the connecting contacts, compared to the printed wiring board. However, if the semiconductor chips are bonded to the interposer without testing the interposer first, then it has to be accepted that there will be a certain degree of risk in that the yield of the interposer is low.
For instance, the field programmable gate array (FPGA) product can stack three or four FPGA chips (called slices or regions) on the interposer using the advanced fabrication technique to form a larger chip with extraordinary capacity. Although the interposer may only be a carrier that is relatively cheap, compared to the high-end semiconductor chips stacked on top of it, the chips, once bonded to the interposer, cannot be removed when an error is found afterwards. Since the interposer does not have any active component, to apply a built-in self-test method to the interposer alone is not able to conduct. If the chips are connected to a defective interposer, the chips will be wasted, resulting in an expensive loss. Therefore, to reduce the risk of fabrication, an external test method for the interposer may be needed.